JPH0478843U - - Google Patents

Info

Publication number
JPH0478843U
JPH0478843U JP12143890U JP12143890U JPH0478843U JP H0478843 U JPH0478843 U JP H0478843U JP 12143890 U JP12143890 U JP 12143890U JP 12143890 U JP12143890 U JP 12143890U JP H0478843 U JPH0478843 U JP H0478843U
Authority
JP
Japan
Prior art keywords
clock
data
writing
fifo
fifo memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12143890U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12143890U priority Critical patent/JPH0478843U/ja
Publication of JPH0478843U publication Critical patent/JPH0478843U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Communication Control (AREA)
JP12143890U 1990-11-19 1990-11-19 Pending JPH0478843U (en])

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12143890U JPH0478843U (en]) 1990-11-19 1990-11-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12143890U JPH0478843U (en]) 1990-11-19 1990-11-19

Publications (1)

Publication Number Publication Date
JPH0478843U true JPH0478843U (en]) 1992-07-09

Family

ID=31869295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12143890U Pending JPH0478843U (en]) 1990-11-19 1990-11-19

Country Status (1)

Country Link
JP (1) JPH0478843U (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08255475A (ja) * 1994-11-23 1996-10-01 Samsung Semiconductor Inc ページイン、バーストアウトｆｉｆｏ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08255475A (ja) * 1994-11-23 1996-10-01 Samsung Semiconductor Inc ページイン、バーストアウトｆｉｆｏ

Similar Documents

Publication Publication Date Title
EP0365023A3 (en) Address control circuit for data memory employed in signal delay circuit
JPH0478843U (en])
JPS59165040U (ja) デ−タ出力制御装置
JPS59161185U (ja) デジタル画像表示回路
JPH06103026A (ja) メモリシステム
JPS5850775U (ja) 受信装置
JP2968636B2 (ja) マイクロコンピュータ
JPS6037753Y2 (ja) メモリカ−ド構成
JP2876488B2 (ja) 半導体ファイルメモリ装置
JPS60120560U (ja) Ｃｄプレ−ヤにおけるアドレス制御回路
JPH0340057A (ja) データ転送装置
JPS60164258U (ja) デ−タ転送制御装置
JPS58140599U (ja) ダイナミツクランダムアクセスメモリ制御回路
JPS5851361U (ja) マイクロコンピユ−タ制御回路
JPS59119B2 (ja) 音声応答装置
JPS5878245A (ja) 読み出し・書き込み制御方式
JPH023853A (ja) Ｃｐｕのインタフェース方法
JPS6413568U (en])
JPS62250562A (ja) 磁気デイスク装置
JPH02278454A (ja) データ転送タイミング制御方式
JPH0191959U (en])
JPS59194199U (ja) 磁気バブル記憶装置
JPS62174844A (ja) メモリ優先切替方式
JPH03269662A (ja) 高速メモリアクセス方式
JPS58144958U (ja) メモリ制御装置